Influence of different peripheral protections on the breakover voltage of a 4H-SiC GTO thyristor

摘要

4H-SiC asymmetrical gate turn-off (GTO) thyristors have been developed using a PP~-NP~+ epitaxial layer structure, where P~- is a 35 μm thick p-type drift layer doped at 5x10~(l4)cm~(-3). The process sequence uses plasma etching steps (ECRRIE) in order to expose inter-digitated devices with a recessed gate structure. Knowing the difficulty in reaching the theoretical forward blocking capability of V_b = 6 kV, calculated by numerical simulations using the finite element code MEDICI~(TM), three different device terminations were realized. The first and simplest termination used is a MESA etched down to 12 μm depth into the drift layer. Better performances were expected by using a combination of mesa and Junction Termination Extension (JTE), where implantation and anneal have to be precisely adjusted. Finally, Etched Guard Ring (EGR) terminations were realized etching five 2 μm wide grooves around the device periphery through the n-base layer. Electrical characteristics of the devices with all the three terminations are presented and discussed. The highest breakover voltage measured for mesa terminated devices reaches 3.9 kV.