A Novel High-Voltage Normally-Off 4H-SiC Vertical JFET

摘要

A novel planar high-voltage normally-off 4H-SiC vertical JFET (VJFET) is proposed, modeled and fabricated. Its DC and switching characteristics at 300K and 600K are investigated by way of two-dimensional numerical simulations. A structure with 12μm 6.8xl0~(15)cm~(-3) doped drift layer is simulated showing blocking voltages of 1644V and 1928V with specific on-resistances of 4.8mΩ·cm~2 and 19.6mΩ·cm~2 at 300K and 600K, respectively. With a dV_G/dt of lx10~7V/s, the turn-on time is 243ns and the turn-off time is 117ns. Processing technology for the feasibility demonstration has been developed and applied to a structure with a 22μm mid-10~(15)cm~(-3) doped drift layer, leading to the successful fabrication of the first 2,510V normally-off SiC VJFET.