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Susceptibility Evaluation of 3D Integrated Static Random Access Memory with Through-Silicon Vias (TSVs)

机译:带有硅通孔(TSV)的3D集成静态随机存取存储器的磁化率评估

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摘要

Three-dimensional integrated circuit (3DIC) technology has a greater advantage over conventional planar technology in terms of higher performance and yield. Circuits with different functions are placed on each tier. In this paper, the susceptibility of static random access memory (SRAM) which integrated with three-dimensional integrated circuit technology, are evaluated using a Monte Carlo simulation method based on the Geant4 simulation toolkit. Cross sections of single event upset (SEU) induced by different energy ions are presented. The results show that the sensitivity of each die of 3D SRAM is similar. The cross section of 3D SRAM is one order of magnitude smaller than that of the planar process due to the reduction of cell density. Additionally, the impact of TSVs on single event upset of 3D SRAM are explored using heavy ions with different energies. The high-energy ions can increase cross section of 3D SRAM due to the increase of nuclear reaction between ions and tungsten. However, the TSV filled with tungsten can shield the incident low-energy ions and decrease the cross sections.
机译:就更高的性能和良率而言,三维集成电路(3DIC)技术比常规平面技术具有更大的优势。具有不同功能的电路放置在每一层上。在本文中,使用基于Geant4仿真工具包的Monte Carlo仿真方法评估了集成了三维集成电路技术的静态随机存取存储器(SRAM)的敏感性。呈现了由不同能量离子引起的单事件不安定(SEU)的横截面。结果表明,3D SRAM的每个芯片的灵敏度都相似。由于单元密度的降低,3D SRAM的横截面比平面工艺的横截面小一个数量级。此外,使用具有不同能量的重离子探索了TSV对3D SRAM的单事件翻转的影响。由于离子与钨之间核反应的增加,高能离子会增加3D SRAM的横截面。但是,填充钨的TSV可以屏蔽入射的低能离子并减小横截面。

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