The Role of Membrane Threshold and Rate in STDP Silicon Neuron Circuit Simulation

摘要

Spike-timing dependent synaptic plasticity (STDP) circuitry is designed in 0.35μm CMOS VLSI. By setting different circuit parameters and generating diverse spike inputs, we got different steady weight distributions. Through analysing these simulation results, we show the effect of membrane threshold and input rate in STDP adaptation.