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Passivation of Si and SiGe/Si Structures with 1 -Octadecene Monolayers

机译:1-辛十八烯单层钝化Si和SiGe / Si结构

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摘要

The electrical properties of structures included 1-octadecene (C_nH_(2n), n=18) monolayers deposed onto the oxide-free silicon surface or Si/SiGe/Si layers were analyzed as a function of surface pretreatment (hydrogen- or iodine-terminated silicon surface) and layer deposition regime (thermal- or photo-activated process). Two types of traps (for electrons and holes) were found at the interface between the monolayers and substrate. The density of traps was shown to depend on the, H- or I-termination of the silicon surface, the illumination intensity and deposition time during photo-activated deposition, and the temperature of thermal-activated deposition. The optimal regimes can be chosen for minimization of the surface charge in the structures covered with 1 -octadecene monolayers, which provides a high conductivity of thin near-surface layers.
机译:分析了包含在无氧化物硅表面或Si / SiGe / Si层上的1-十八碳烯(C_nH_(2n),n = 18)单层结构的电性能,并根据表面预处理(氢或碘终止)进行了分析硅表面)和层沉积方式(热激活或光激活过程)。在单分子层和衬底之间的界面处发现了两种类型的陷阱(用于电子和空穴)。陷阱的密度显示为取决于硅表面的H或I端接,光活化沉积过程中的光照强度和沉积时间以及热活化沉积的温度。可以选择最佳方案,以使被1-十八碳烯单层覆盖的结构中的表面电荷最小化,这提供了薄的近表面层的高电导率。

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