A 64 GB/s 1.5 PJ/Bit PAM-4 Transmitter with 3-Tap FFE and GM-Regulated Active-Feedback Driver in 28 NM CMOS

摘要

-regulated active-feedback driver. The FFE tap generation is merged into serializer to minimize the overhead of FFE, by replacing a power-hungry delay generator. An active-feedback inverter based driver is also proposed to achieve a larger output swing compared with a resistive- feedback driver with limited output swing. The prototype chip is fabricated in 28nm CMOS technology and occupies 0.185 mm