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ATPG for transition faults of pipelined threshold logic circuits

机译:ATPG用于流水线阈值逻辑电路的过渡故障

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摘要

Due to the recent developments in emerging switching devices the significance of threshold logic gates has drastically increased in recent years. There is an increased need to test for manufacturing defects and, in particular, for delay defects. An automatic test pattern generation approach for the transition delay fault model of pipelined current mode threshold logic circuits is introduced. This approach takes into consideration an ordering of the patterns at the input of the selected gate in order to ensure the maximum transition delay. Experimental results show the efficiency of the proposed method on selected critical gates.
机译:由于新兴的开关设备的最新发展,阈值逻辑门的重要性近年来已大大增加。越来越需要测试制造缺陷,尤其是延迟缺陷。介绍了流水线电流模式阈值逻辑电路过渡延迟故障模型的自动测试模式生成方法。该方法考虑了所选门的输入处的图案的顺序,以确保最大的转换延迟。实验结果表明,该方法在选定的临界门上的有效性。

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