A High PSRR Low Drop-out Linear Regulator without Output Capacitor

摘要

Power Supply Rejection Ratio (PSRR) is a crucial parameter for Low Drop-out (LDO) linear regulator, which is widely applied in the audio circuit. In order to achieve high PSRR, a high-gain, high-bandwidth error amplifier is necessary. In this paper, we combined lag compensation and miller compensation to implement a high PSRR LDO linear regulator without output capacitors. The LDO structure proposed in this paper was implemented by CSMC 0.5 μm process, simulated by spectre, of which the output reference voltage was 1.8V, and PSRR was 79dB and 70dB at Direct Current(DC) and 20KHz separately, better than 20dB at high frequency.