AN ACCURATE MODEL FOR THRESHOLD VOLTAGE AND S-FACTOR OF PARTIALLY-DEPLETED SURROUNDING GATE TRANSISTOR (PD-SGT)

摘要

This paper proposes an accurate model for threshold voltage and S-factor of Partially-Depleted Surrounding Gate Transistor (PD-SGT) for the first time. Moreover, accurate electric field, potential and depletion region width peculiar to a three-dimensional (3D) cylindrical structure are obtained. The analysis using this model is very usefull for distinction whether the device operates in a Partially-Depleted (PD) or a Fully-Depleted (FD) condition. The results numerically calculated by this model agree well with those of 3D device simulator.