首页> 外文会议>Electrochemical Society Meeting and International Symposium on Silicon-on-Insulator Technology and Devices XI; 20030428-20030502; Paris; FR >QUASI-THREE-DIMENSIONAL DEVICE SIMULATION OF FULLY DEPLETED MOSFET/SOI FOCUSING ON SURFACE ROUGHNESS
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QUASI-THREE-DIMENSIONAL DEVICE SIMULATION OF FULLY DEPLETED MOSFET/SOI FOCUSING ON SURFACE ROUGHNESS

机译:在表面粗糙度下完全耗尽的MOSFET / SOI的准三维器件仿真

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摘要

A novel simulation method using TCAD is proposed to investigate the effects of surface roughness on operational characteristics of FD MOSFETs/SOI. The method provides guidelines for estimating surface roughness of an SOI substrate with an ultrathin top Si layer. A quasi-three-dimensional device simulation was performed by employing topographical data on SOI substrates from AFM measurements and a device model with divided structures in appropriate dimensions along a channel. A decrease in the drain current at a high effective normal field, and an increase in the subthreshold current were observed. The results imply a numerical requirement for determining the surface roughness of SOI wafers from the perspective of FD MOSFETs.
机译:为了研究表面粗糙度对FD MOSFETs / SOI的工作特性的影响,提出了一种使用TCAD的新型仿真方法。该方法提供了用于估计具有超薄顶部硅层的SOI衬底的表面粗糙度的指南。通过使用AFM测量获得的SOI衬底上的形貌数据和沿通道以适当尺寸划分结构的器件模型,来进行准三维器件仿真。在高有效法向电场下,漏极电流减小,而亚阈值电流增大。结果暗示从FD MOSFET的角度确定SOI晶片表面粗糙度的数值要求。

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