首页> 外文会议>Eco-Materials Processing and Design VIII; Materials Science Forum; vols.544-545 >Reliability Evaluation of Underfill Encapsulated Pb- Free Flip Chip Package under Thermal Shock Test
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Reliability Evaluation of Underfill Encapsulated Pb- Free Flip Chip Package under Thermal Shock Test

机译:底部填充封装的无铅倒装芯片封装在热冲击试验下的可靠性评估

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Thermo-mechanical reliability of the solder bumped flip chip packages having underfill encapsulant was evaluated with thermal shock testing. In the initial reaction, the reaction product between the solder and Cu mini bump of chip side was Cu_6Sn_5 IMC layer, while the two phases which were (Cu,Ni)_6Sn_5 and (Ni,Cu)_3Sn_4 were formed between the solder and electroless Ni-P layer of the package side. A crack was formed at the upper edge region of solder bump, and propagated through the solder region. The primary failure mechanism of the solder joints in this type of package was confirmed to be thermally activated solder fatigue failure. After thermal shocks of 2000 cycles, one more crack which was not observed in the case of non-underfill encapsulated flip chip was observed at the left side of interface between solder bump and substrate. The addition of this crack formation should be due to the underfill encapsulation between the Si chip and substrate.
机译:通过热冲击测试评估了具有底部填充密封剂的焊料凸点倒装芯片封装的热机械可靠性。在初始反应中,焊料与芯片侧Cu微型凸点之间的反应产物为Cu_6Sn_5 IMC层,而在焊料与化学镀Ni之间形成了(Cu,Ni)_6Sn_5和(Ni,Cu)_3Sn_4两相。 -P层的包装面。裂纹在焊料凸块的上边缘区域形成,并传播通过焊料区域。确认这种封装中焊点的主要失效机理是热活化焊料疲劳失效。经过2000次循环的热冲击后,在焊料凸点和基板之间的界面左侧发现了一个未在未底部填充封装的倒装芯片中观察到的裂纹。这种裂纹的形成应归因于硅芯片和衬底之间的底部填充封装。

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