Engineering dislocation dynamics in In_x(Al_yGa_(1-y))_(1-x)P graded buffers grown on GaP by MOVPE

摘要

To engineer high-quality In_x(Al_yGa_(1-y)_(1-x)P/GaP graded buffers, we have explored the effects of graded buffer design and MOVPE growth conditions on material quality. We demonstrate that surface roughness causes threading dislocation density (TDD) to increase with continued grading: dislocations and roughness interact in a recursive, escalating cycle to form pileups that cause increasing roughness and dislocation nucleation. Experiments show that V/III ratio, temperature, and grading rate can be used to control dislocation dynamics and surface roughness in In_xGa_(1-x_P graded buffers. Control of these parameters individually has resulted in x=0.34 graded buffers with TDD=5x10~6 cm~(-2) and roughness = 15 nm and a simple optimization has resulted in TDD=3X10~6 cm~(-2) and roughness =10nm. Our most recent work has focused on more sophisticated optimization and the incorporation of aluminum for x>0.20 to keep the graded buffer completely transparent above 545 nm. Given our results, we expect to achieve transparent, device-quality In_x(Al_yGa_(1-y))_(1-x)P/GaP graded buffers with TDD<10~6 cm~(-2).