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A COMPILER DRIVEN SIMULATION TECHNIQUE FOR THE ANALYSIS OF DIGITAL LOGIC CIRCUIT

机译:用于数字逻辑电路分析的编译器驱动仿真技术

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An interface technique for design and analysis of digital circuits has been devised and described in this paper. Basically logic circuits are of two types: combinational circuits and sequential circuits. Logic simulation usually means finding the transient response to a set of time-varying inputs. Simulation follows functional or behavioral level design. Behavioural simulation describes logic function and timing; functional simulation describes the logic function of a system only and ignores the timing. A simulation program for giving the output of digital logic circuits is available, but the approach taken here describes an efficient way to analyze both combinational and sequential circuits. To do this an algorithm has been developed, coded in Turbo C and tested with test cases to analyze and provide output from that logic circuit.
机译:本文设计并描述了一种用于数字电路设计和分析的接口技术。逻辑电路基本上有两种类型:组合电路和顺序电路。逻辑仿真通常意味着找到对一组随时间变化的输入的瞬态响应。仿真遵循功能或行为级别的设计。行为仿真描述了逻辑功能和时序;功能仿真仅描述系统的逻辑功能,而忽略时序。可以使用提供数字逻辑电路输出的仿真程序,但是此处采用的方法描述了一种分析组合电路和时序电路的有效方法。为此,已经开发了一种算法,在Turbo C中进行了编码,并通过测试用例进行了测试,以分析并提供该逻辑电路的输出。

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