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Study of selective 'chemical downstream plasma etching' of silicon nitride and silicon oxide for advanced patterning applications

机译:用于高级构图应用的选择性“化学下游等离子体刻蚀”氮化硅和氧化硅的研究

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The evolution of integrated components in the semiconductors industry is nowadays looking for ultra-high selective etching processes in order to etch high aspect ratio structures in complicated stacks of ultrathin layers. For ultra-high selective processes, typical plasma etching show limitations, while wet etching processes reach limitations due to capillary forces. For these reasons there is a great regain of interest today in chemical downstream etching systems(CDE), which combine the advantages of plasma and wet treatments. The absence of photons and ions allow to minimize damages and to achieve very high selectivity (in isotropic etching). In this work we investigated the parameters enabling to etch selectively the Si_3N_4 to the SiO_2 by CDE. We shown that the correlation between the gas mixture and the wafer temperature is the key to obtain the desired selectivity. In order to optimize the processing window, the mixture composition (NF_3/N_2/O_2/He) and the temperatures were screened by seveverals DOE (Designs Of Experiments). Conditions are found in which the etching selectivity between the two silicon alloys is higher than 100, which allowed us to clean out sacrificial Si_3N_4 layers in very high aspect ratio (about 100) silicon trenches of nanometric size (60nm) without damaging the 10nm thin SiO_2 caping layer (between the Si and the Si3N4). This demonstrates that downstream plasma etching can perform better than wet treatments in this case.
机译:当今,半导体工业中集成组件的发展正在寻找超高选择性蚀刻工艺,以在复杂的超薄层堆叠中蚀刻高深宽比结构。对于超高选择性工艺,典型的等离子蚀刻显示出局限性,而湿蚀刻工艺由于毛细作用力而达到局限性。由于这些原因,如今在化学下游蚀刻系统(CDE)中重新获得了极大的兴趣,该系统结合了等离子体和湿法处理的优点。由于没有光子和离子,因此可以最大程度地减少损坏并实现非常高的选择性(在各向同性蚀刻中)。在这项工作中,我们研究了能够通过CDE选择性地将Si_3N_4刻蚀为SiO_2的参数。我们表明,气体混合物与晶片温度之间的相关性是获得所需选择性的关键。为了优化处理窗口,混合物的成分(NF_3 / N_2 / O_2 / He)和温度通过数个DOE(实验设计)进行筛选。发现了两种硅合金之间的蚀刻选择性高于100的条件,这使我们能够在非常高的纵横比(约100)纳米尺寸(60nm)的硅沟槽中清除牺牲的Si_3N_4层而不会损坏10nm的薄SiO_2覆盖层(在Si和Si 3 N 4之间)。这表明在这种情况下,下游等离子蚀刻的性能要好于湿法处理。

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