Iterative Self-Timed Multiplier with Early Completion

摘要

We designed a self-timed multiplier with DCVSL. The multiplier supports 32-bit integer multiplication of both signed and unsigned operands. It incorporates an early completion scheme for fast operation. We proposed a 4-phase handshake circuit that fits well with DCVSL. We implemented the designed multiplier with 0.25 um CMOS technology. The performance of the multiplier varies between 20.5M and 128M multiplications per second depending on the inputs. The size of core multiplier is 700 um x 350 um.