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Short-circuit performance of multi-chip SiC MOSFET modules

机译:多芯片SiC MOSFET模块的短路性能

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This paper presents short-circuit test results on commercial, multi-chip 1200 V SiC MOSFET half-bridge modules up to 860 V dc, suitable for three-phase 480 V grid-interfaced applications. The peak short-circuit current is measured to be over 5 kA, with around 3 μs withstand for the given voltage and commutation loop inductance. During the post-failure investigation, it is observed that only a few chips have failed in some cases, leading to a hypothesis that an asymmetric stress distribution is initiating the devices' failure. As the chiplevel data are not available for the high current modules, this problem is investigated by testing parallel connected TO-247 discrete devices from the same device manufacturer, after characterizing the individual devices. The gate threshold characterization data and the test results on the parallel connected discrete devices explaining the failure mechanism are provided. It is to be noted that the devices are intentionally subjected to destructive tests, with the objective of evaluating their failure mechanism.
机译:本文介绍了高达860 V dc,适用于三相480 V电网接口应用的商用多芯片1200 V SiC MOSFET半桥模块的短路测试结果。测量的峰值短路电流超过5 kA,对于给定的电压和换向环路电感,大约可承受3μs的电流。在故障后调查中,观察到在某些情况下只有少数芯片发生故障,从而导致了一个假设,即不对称的应力分布正在引发设备的故障。由于无法提供大电流模块的芯片级数据,因此在表征单个器件后,通过测试来自同一器件制造商的并行连接的TO-247分立器件来研究此问题。提供了门限阈值特征数据和并联连接的分立器件的测试结果,说明了故障机理。要注意的是,有意对设备进行破坏性测试,目的是评估其故障机理。

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