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Design of a GPU-styled softcore on field programmable gate array

机译:现场可编程门阵列上GPU风格的软核的设计

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This work describes a softcore design of a processor in style of Graphic Processing Units. The design is realized using Verilog Hardware Description Language. The proposed design has an advantage in the flexibility to scale up by adding more processing elements to attain more speedup. The design of its instruction set architecture is explained. A realization of four processing elements processor is presented. It requires 268,637 equivalent gates. The maximum frequency is 117 MHz. It is suitable of embedded applications. In term of cycles consumed, it compares very well to a test program running on commercial Intel's CPU, Core2 Duo P8400.
机译:这项工作描述了图形处理单元样式的处理器的软核设计。该设计是使用Verilog硬件描述语言实现的。所提出的设计的优势在于,通过添加更多的处理元素来实现更大的加速,可以灵活地进行规模扩展。解释了其指令集体系结构的设计。提出了四个处理元件处理器的实现。它需要268,637个等效门。最大频率为117 MHz。它适用于嵌入式应用程序。就消耗的周期而言,它与在商用英特尔CPU Core2 Duo P8400上运行的测试程序相比非常好。

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