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Design of single neuron on FPGA

机译:FPGA上单神经元的设计

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This paper presents a digital design of neuron architecture on field-programmable gate array (FPGA). The objective of this project is to translate data from electrochemical sensor signals and process the data with neuron structure on digital hardware. The hardware realization of neural network requires investigation of many design issues relating to signal interfacing and design of a single neuron. Analysis focuses on effect of digital design decisions such as module architecture towards data accuracy and delay. The work touches on analogue to digital interfacing, data structure and digital module design that includes adder, multiplier and multiplier accumulator (MAC). A major component of the algorithm is the design of the activation function. The chosen activation function is the hyperbolic tangent which is approximated by Taylor Series expansion. The neuron is evaluated on an Altera DE2–70 FPGA. The performances are evaluated in terms of functionality, usage of resources and timing analysis. For the data structure, it was demonstrated that increasing the fractional bits will increases the precision. The neuron functionality was demonstrated on digital platform. It was found that less delay were produce by using Carry Look Ahead design compared to Ripple Carry Adder by 25% in the MAC performance.
机译:本文提出了现场可编程门阵列(FPGA)上神经元体系结构的数字设计。该项目的目的是转换电化学传感器信号中的数据,并在数字硬件上处理具有神经元结构的数据。神经网络的硬件实现需要研究许多与信号接口和单个神经元设计有关的设计问题。分析重点在于数字设计决策(例如模块架构)对数据准确性和延迟的影响。这项工作涉及模拟到数字接口,数据结构和数字模块设计,包括加法器,乘法器和乘法器累加器(MAC)。该算法的主要组成部分是激活函数的设计。选择的激活函数是双曲线正切,可通过泰勒级数展开式近似。在Altera DE2-70 FPGA上评估神经元。根据功能,资源使用情况和时序分析来评估性能。对于数据结构,已证明增加小数位将提高精度。在数字平台上演示了神经元功能。结果发现,与Ripple Carry Adder相比,使用Carry Look Ahead设计产生的延迟更少,MAC性能提高了25%。

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