FPGA DESIGN SUPPORT SYSTEM AND FPGA DESIGN SUPPORT METHOD AND FPGA DESIGN SUPPORT PROGRAM

摘要

PROBLEM TO BE SOLVED: To provide an FPGA design support system for estimating an SER in the case of applying a TMR to a user circuit in the design step of the FPGA.SOLUTION: The FPGA design support system includes: a TMR effect information DB 17 for storing information including an SER reduction rate in the case of applying a TMR; a CRAM_SER calculation part 12 for calculating the SER of a whole CRAM installed in an FPGA; an FPGA resource activity ratio calculation part 13 for calculating the activity ratio of the FPGA resource of each circuit block; a circuit block SER calculation part 11 for calculating the SER of a circuit block unit on the basis of the SER of the whole CRAM and the activity ratio of the FPGA resource of each circuit block; a TMR block SER calculation part 14 for calculating the SER of the TMR block on the basis of the reduction rate of the SER in the case of applying the SER and TMR about the TMR block; and an SER calculation part 10 for calculating the SER of a whole user circuit on the basis of the SER of each circuit block and the SER of each TMR block.