首页> 外文会议>2012 IEEE 14th Electronics Packaging Technology Conference >Low temperature wafer bonding of CMOS wafers
【24h】

Low temperature wafer bonding of CMOS wafers

机译:CMOS晶圆的低温晶圆键合

获取原文
获取原文并翻译 | 示例

摘要

The continuous need for consumer electronics miniaturization requires not only size shrinking, but also higher degree of integration. The new demands imposed wafer bonding as an attractive technology for wafer-level integration. The resulting increased complexity of the devices brings new challenges to the processing techniques. In manufacturing processes wafer bonding can be used for integration of the electronic components (e.g. Complementary Metal-Oxide- Semiconductor — CMOS — circuitries) with the mechanical (e.g. resonators) or optical components (e.g. waveguides, mirrors) in a single, wafer-level process step. Wafer bonding using CMOS wafers brings additional challenges due to very strict specific requirements, particularly in terms of process temperature and contamination. These challenges were identified and wafer bonding process solutions will be presented illustrated with examples.
机译:对消费电子产品小型化的持续需求不仅需要尺寸缩小,而且需要更高的集成度。新的要求将晶圆键合作为一种有吸引力的晶圆级集成技术。所导致的设备复杂性的增加给处理技术带来了新的挑战。在制造过程中,晶圆键合可用于在单个晶圆级将电子组件(例如互补金属氧化物半导体-CMOS-电路)与机械组件(例如谐振器)或光学组件(例如波导,反射镜)集成在一起处理步骤。由于非常严格的特定要求,特别是在工艺温度和污染方面,使用CMOS晶圆的晶圆键合带来了其他挑战。确定了这些挑战,并通过示例说明了晶圆键合工艺解决方案。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号