首页> 外文会议>2006 China-Ireland International Conference on Information and Communications Technologies >HiSIM-SOI: Complete Surface-Potential-Based Fully-Depleted SOI-MOSFET Model for Circuit Simulation
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HiSIM-SOI: Complete Surface-Potential-Based Fully-Depleted SOI-MOSFET Model for Circuit Simulation

机译:HiSIM-SOI:完整的基于表面电势的全耗尽SOI-MOSFET模型,用于电路仿真

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摘要

The circuit simulation model for fully-depleted SOI-MOSFET is developed based on the surface-potential description considering the potential distribution vertical to the channel and parallel to the surface explicitly. Besides the comparison to measured I-V data, the model is verified with 1/f noise analysis, sensitive to the carrier concentration and distribution along the channel. The increased carrier concentration in SOI-MOSFET causes enhanced 1/f noise in comparison to bulk MOSFETs.
机译:基于表面电势描述,考虑了垂直于沟道和平行于表面的电势分布,开发了全耗尽型SOI-MOSFET的电路仿真模型。除了与测量的I-V数据进行比较外,还对1 / f噪声分析进行了验证,该模型对载波浓度和沿通道的分布敏感。与块状MOSFET相比,SOI-MOSFET中增加的载流子浓度导致增强的1 / f噪声。

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