Multi-dimensional integrated chip design and methods of making them using wafer stack processing techniques

摘要

A method of forming a multi-dimensional integrated chip structure, comprising: bonding a second substrate to a top surface of a first substrate, making a first edge trim cut along a first loop and into a first peripheral portion of the second substrate, making a second edge trim cut along a second Loop and into a second peripheral portion of the second substrate and into the first substrate and performing a third edge trim cut along a third loop and into a third peripheral portion of the first substrate.