Transistors and transistor layers include an InAlN and AlGaN bi-layer capping stack on a 2DEG GaN channel, such as for GaN MOS structures on Si substrates. GaN channels can be formed in the GaN buffer layer or stack to compensate for the high crystalline structure lattice size and thermal expansion coefficient mismatch between GaN and Si. The double-layer capping stack of the top InAlN layer on the bottom AlGaN layer to induce charge polarization in the channel compensates for the poor compositional non-uniformity of (e.g., Al) and the rough surface morphology of the bottom surface of the InAlN material. This can lead to sheet resistances between 250 ohms/sqr and 350 ohms/sqr. This may also reduce the warpage of GaN on Si wafers during growth of the layer of InAlN material, and may provide an AlGaN setback layer for etching the InAlN layer in the gate region.
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