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Method of measuring defect of SiC wafer, standard sample, and manufacturing method of SiC epitaxial wafer

机译:测量SiC外延晶片SiC晶片,标准样品和制造方法的缺陷的方法

摘要

A SiC wafer defect measuring method which includes a device management step of managing a defect measuring device by irradiating a reference sample made of a material having a light-emitting intensity that does not change with repeated irradiation by excitation light and which has a pattern made of recesses and/or protrusions in the surface, the irradiation by the excitation light being performed before measuring defects in a SiC wafer and under the same irradiation conditions as the measurement of the defects in the SiC wafer, and then measuring the S/N ratio of the pattern from a reflection image of the pattern.
机译:一种SiC晶片缺陷测量方法,其包括通过照射由具有发光强度的材料制成的参考样本来管理缺陷测量装置的装置管理步骤,该参考样品不会通过激发光线的重复照射而不改变,并且具有由其制成的图案 表面中的凹槽和/或突起,在测量SiC晶片中的缺陷之前进行激发光的辐射,并在与SiC晶片中的缺陷的测量相同的照射条件下,然后测量S / N比 来自图案的反射图像的模式。

著录项

  • 公开/公告号JP6931995B2

    专利类型

  • 公开/公告日2021-09-08

    原文格式PDF

  • 申请/专利权人 昭和電工株式会社;

    申请/专利号JP20160255628

  • 发明设计人 亀井 宏二;

    申请日2016-12-28

  • 分类号C30B29/36;C30B25/02;H01L21/66;G01B11/02;

  • 国家 JP

  • 入库时间 2022-08-24 20:53:55

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