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Inspection system, wafer map display, wafer map display method, and computer program

机译:检查系统,晶圆映射显示,晶圆地图显示方法和计算机程序

摘要

An inspection system is provided with a prober and a tester. The tester includes a plurality of tester module boards on which a plurality of LSIs respectively corresponding to a plurality of devices under test (DUT) are mounted; a display unit which displays a wafer map indicating inspection results of the plurality of DUTs and/or self-diagnosis results of the tester; and a tester control unit which includes a wafer map drawing application for drawing the wafer map displayed on the display unit. The wafer map drawing application causes the inspection results and/or the self-diagnosis results to be displayed for each of the plurality of DUTs in a stepwise manner. In the wafer map, the plurality of DUTs are respectively linked to correspond to the plurality of LSIs mounted on the plurality of tester module boards.
机译:检查系统配有探针和测试仪。测试仪包括多个测试仪模块板,在该测试仪模块板上,安装有多个对应于测试(DUT)的多个设备的LSIS;显示单元,显示晶片图,其指示测试仪的多个DUT和/或自诊断结果的检查结果;和测试仪控制单元,其包括用于绘制在显示单元上显示的晶片图的晶片图绘图应用。晶片图绘图应用程序以逐步的方式导致检查结果和/或以对多个DUT中的每一个显示的自诊断结果。在晶片图中,多个DUT分别连接到对应于安装在多个测试仪模块板上的多个LSI。

著录项

  • 公开/公告号US11009544B2

    专利类型

  • 公开/公告日2021-05-18

    原文格式PDF

  • 申请/专利权人 TOKYO ELECTRON LIMITED;

    申请/专利号US201816499159

  • 发明设计人 SHIN UCHIDA;TETSUYA KAGAMI;

    申请日2018-02-08

  • 分类号G01R31/28;

  • 国家 US

  • 入库时间 2022-08-24 18:43:27

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