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SILICON-CARBIDE SHIELDED-MOSFET EMBEDDED WITH TRENCH SCHOTTKY DIODE AND HETEROJUNCTION GATE

机译:含有沟槽肖特基二极管和异质结门的碳化硅屏蔽MOSFET

摘要

A shielded Schottky heterojunction power transistor is made from a Silicon-Carbide (SiC) wafer with SiC epitaxial layers including a N+ source and a Silicon N-epitaxial layer under the gate with higher channel mobility than SiC. The bulk of the wafer is a N+ SiC drain contacted by backside metal. A trench is formed between heterojunction transistors. Metal contacting the N+ source is extended into the trench to form a Schottky diode with the N-SiC substrate. P+ taps on the sides of the trench connect the metal to a P-SiC body diode under the heterojunction gate, and also prevent the Schottky metal from directly contacting the P body diode. Buried P pillars with P+ pillar caps are formed under the trench Schottky diode and under the heterojunction transistors. The P pillars provide shielding by balancing charge with the N substrate, acting as dielectrics to reduce the E-field above the pillars.
机译:屏蔽肖特基异质结电力晶体管由碳化硅(SiC)晶片制成,其具有SiC外延层,包括N +源和栅极下方的硅和硅N外层,具有比SiC更高的通道迁移率。晶片的大部分是由背面金属接触的n + siC漏极。在异质结晶体管之间形成沟槽。接触N +源的金属延伸到沟槽中以形成具有N-SiC基板的肖特基二极管。沟槽侧面上的P +水龙头将金属连接到异质结闸栅极下的P-SiC体二极管,并且还防止肖特基金属直接接触P体二极管。使用P +柱盖的埋地P支柱形成在沟槽肖特基二极管下方和异质结晶体管下方。 P支柱通过使用N基板平衡电荷提供屏蔽,充当电介质以减少支柱上方的电子场。

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