MANUFACTURE OF GALLIUM ARSENIC SCHOTTKY BARRIER JUNCTION GATE TYPE FIELD EFFECT TRANSISTOR

摘要

PURPOSE:To contrive to reduce gate capacity and to enhance the gate withstand voltage of the titled device by a method wherein the surface of a high melting point metal layer is etched according to isotropic etching to provide intervals between the high melting point metal layer and n+ type layers. CONSTITUTION:Ions of an element to act as a doner are implanted to a semiinsulating GaAs substrate 21 using a high melting point metal layer 23 as a mask. Then annealing is performed to convert the implanted layers into n+ type layers 24. Then the surface of the layer 23 is etched according to isotropic etching to provide intervals 25 between the layer 23 and the layers 24. Then ohmic electrodes 26, 27 are formed on both the sides of the layer 23. Accordingly, because the layer 23 and the layers 24 are separated, gate capacity is small, and a GaAs Schottky barrier junction gate type FET having the large gate withstand voltage can be obtained.