LATCH-UP PREVENTION IN A TWO SUPPLIES CMOS INTEGRATED CIRCUIT BY MEANS OF A SINGLE INTEGRATED MOS TRANSISTOR

• 1. 用于系统级CMOS集成电路的二次线性电源系统的防闩锁电路 [P] . 中国专利： CN101727122B . 2011.12.07
• 2. 用于系统级CMOS集成电路的二次线性电源系统的防闩锁电路 [P] . 中国专利： CN101727122A . 2010-06-09
• 3. LATCH-UP PREVENTION IN A TWO SUPPLIES, CMOS INTEGRATED CIRCUIT BY MEANS OF A SINGLE INTEGRATED MOS TRANSISTOR [P] . 英国专利： GB2202403B . 1991-07-31

  机译： 通过单集成MOS晶体管实现的两种电源CMOS集成电路的锁存预防

• 4. Latch-up prevention in a two-power-supply CMOS integrated circuit by means of a single integrated MOS transistor [P] . 美国专利： US4871927A . 1989-10-03

  机译： 通过单个集成MOS晶体管防止在双电源CMOS集成电路中发生闩锁

• 5. LATCH-UP PREVENTION IN TWO SUPPLIES CMOS INTEGRATED CIRCUIT BY MEANS OF SINGLE INTEGRATED MOS TRANSISTOR [P] . 英国专利： GB8804099D0 . 1988-03-23

  机译： 通过单集成MOS晶体管防止两种电源CMOS集成电路中的闩锁

• 1. TRANSIENT CHARACTERISTIC ANALYSIS OF HIGH TEMPERATURE CMOS DIGITAL INTEGRATED CIRCUITS [J] . 柯导明, 冯耀兰, 童勤义, 电子科学学刊：英文版 . 1994,第002期
• 2. Development of 0.50μm CMOS Integrated Circuits Technology [J] . 系统工程与电子技术：英文版 . 1992,第004期
• 3. Development of Physical Library for Short Channel CMOS / SOI Integrated Circuits [J] . 系统工程与电子技术：英文版 . 1992,第004期
• 4. Some Tools to Model Ground or Supply Bounces Induced in and out of Heterogeneous Integrated Circuits [J] . Christian Gontrand, Olivier Valorge, Rabah Dahmanil, 计算机技术与应用：英文 . 2011,第010期
• 5. Study of CMOS integrated signal processing circuit in capacitive sensors [J] . CAO Yi-jiang, YU Xiang, WANG Lei 哈尔滨工业大学学报（英文版） . 2007,第002期
• 6. CMOS Integrated Single Electron Transistor Electrometry (CMOS-SET) Circuit Design for Nanosecond Quantum-Bit Read-out [C] . Thomas M. Gurrieri, Malcolm S. Carroll, Michael P. Lilly IEEE Conference on Nanotechnology . 2008
• 7. THE PHYSICS AND MODELING OF LATCH-UP AND CMOS INTEGRATED CIRCUITS [D] . ESTREICH, DONALD BRUCE. 1981
• 8. CMOS-based carbon nanotube pass-transistor logic integrated circuits [O] . Li Ding, Zhiyong Zhang, Shibo Liang, -1
• 9. Latch-Up Control in CMOS Integrated Circuits [O] . A. Ochoa, W. Dawes, D. Estreich 1979
• 10. Latch-Up and Radiation Integrated Circuit--LURIC: A Test Chip for CMOS Latch-Up Investigation. [R] . estreich, d. b. 1978

• 1. CMOS集成电路的闩锁及预防 [C] . 马璇 . 2005第十一届全国可靠性物理学术讨论会 . 2005
• 2. SnOx薄膜晶体管和基于氧化物半导体的CMOS集成电路研究 [A] . 李云鹏 . 2019