首页> 外国专利> Apparatus and method for minimizing the let-through voltage associated with circuits used in conjunction with electronic elements to suppress surges, transients and like electrical disturbances

Apparatus and method for minimizing the let-through voltage associated with circuits used in conjunction with electronic elements to suppress surges, transients and like electrical disturbances

机译:用于最小化与与电子元件结合使用的电路相关联的通过电压的装置和方法,以抑制电涌,瞬变和类似的电干扰

摘要

A surge protection circuit is adapted to have a minimum let- through voltage when a power surge is applied thereto. The circuit includes line conductors connecting a power source to an electrical load being protected and clamping elements connected to those line conductors and across the electrical load. The clamping elements each have terminals at each end thereof and these clamping element terminals are connected directly to the line conductors whereby an essentially impedance-free path is established between the line conductors and the clamping element. When the clamping element is activated, the let-through voltage is essentially equal to the clamping voltage of the clamping element and is not increased by a voltage drop generated by an impedance associated with any leads connecting the clamping element to the line conductors. A method is also disclosed, and the power source and the load can be single or multi-phase.
机译:当向其施加电涌时,电涌保护电路适于具有最小的允许电压。该电路包括将电源连接到被保护的电负载的线导体,以及连接到那些线导体并跨越电负载的夹紧元件。每个夹紧元件在其每个端部具有端子,并且这些夹紧元件端子直接连接到线导体,由此在线导体和夹紧元件之间建立了基本上无阻抗的路径。当钳位元件被激活时,允许电压基本上等于钳位元件的钳位电压,并且不会因与将钳位元件连接到线路导体的任何导线相关的阻抗所产生的电压降而增加。还公开了一种方法,并且电源和负载可以是单相或多相的。

著录项

  • 公开/公告号US4835650A

    专利类型

  • 公开/公告日1989-05-30

    原文格式PDF

  • 申请/专利权人 EPSTEIN;BARRY M.;

    申请/专利号US19870109625

  • 发明设计人 BARRY M. EPSTEIN;

    申请日1987-10-16

  • 分类号H02H9/04;

  • 国家 US

  • 入库时间 2022-08-22 06:28:00

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