A semiconductor memory device with improved read - / read mode in the case of pipelined - processing

摘要

a halbleiterspeichereinrichtung in accordance with the present invention is a dynamic halbleiterspeichereinrichtung which, in page mode, a pipelined processing carries out. the halbleiterspeichereinrichtung has two spaltendekoder (5a, 5b), two all other uses are excluded. latches (14a, 14b), a pre amplifier (7a, 7b) and two schreibtreiber (8a, 8b) for a speicherzellenfeld (1).one of a adreu00dfpuffer (9) is sequentially and alternately to the respective spaltenadresse is fed to all other uses are excluded. latches, with one of the spaltendekoder, a preamplifier, etc. according to all other uses are excluded - latches alternately operates.