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Lightly doped drain transistor device having the polysilicon sidewall spacers
Lightly doped drain transistor device having the polysilicon sidewall spacers
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机译:具有多晶硅侧壁间隔物的轻掺杂漏极晶体管器件
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摘要
A lightly doped drain (LDD) transistor device structure and a method of fabricating same are described. A silicon substrate is provided which has a trench formed therein. Polysilicon sidewall spacers are formed on the side walls of the trench. Silicon dioxide sidewall spacers are formed on the side walls of the polysilicon sidewall spacers. A gate oxide layer is formed on the bottom of the trench by oxidation. A polysilicon gate layer is formed filling the trench. Impurities are implanted into the silicon substrate to simultaneously form heavily doped source/drain areas in spaced apart portions of the silicon substrate adjacent to the polysilicon sidewall spacers to improve the conductivity of the polysilicon gate layer, and form lightly doped source/drain areas in spaced apart portions of the silicon substrate under the silicon dioxide sidewall spacers.
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