AUTOMATIC CLOCK-VERIFIER SELECTION METHOD IN REPROGRAMMABLE-HARDWARE EMULATION SYSTEM

摘要

PROBLEM TO BE SOLVED: To easily specify an actual clock tester by deciding the latent speed of respective nets inside the net list of a user. SOLUTION: An operation is performed by initializing the speed of the respective nets to '0' inside the net list. Then, by setting the speed of a clock source specified by the user to '1' first, a latent clock net is marked. Then, after the speed of the output of respective logic elements 58 is set to '1' in the case that one of the input is provided with the speed of '1', the maximum speed of the respective nets is calculated. Thereafter, the trimming processing of the net list is performed by tracing back from respective internal clock signals 30 to the clock source. Then, the net list inputted to the logic element inside the net list slower than the maximum speed of any nets inputted to the logic element is marked as a latent clock tester.