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Logic circuit with the function of controlling discharge current on pull- down and emitter coupled logic circuit
Logic circuit with the function of controlling discharge current on pull- down and emitter coupled logic circuit
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机译:具有控制下拉和发射极耦合逻辑电路上的放电电流的逻辑电路
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摘要
A first current switch circuit 1a outputs a first logic signal and a complementary signal thereof in response to an input logic signal. A pull- up transistor Q10 has a base receiving the first logic signal. A second current switch circuit 1b outputs a second logic signal based on the complementary signal and the potential of an output terminal OUT1. A level shift circuit 1c shifts the level of the second logic signal and provides it to the base of a pull-down transistor Q11. When the potential of an input terminal IN1 changes from a low level to a high level, a capacitive load CL is discharged through transistors Q9 and Q11. When the potential of output terminal OUT1 becomes lower than that of a first reference potential terminal VBB1, the second logic signal attains a low level, thereby turning off pull-down transistor Q11.
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