Department of Electronics & Communication Engineering, M.N.N.I.T, Allahabad, India;
National Institute of Technology, Raipur, India;
CMOS; Integrated; Circuits; CMOS; Logic; Circuit; Dynamic; Threshold; MOS; (DTMOS); Power-Delay; Product; Source-Coupled; Logic; (SCL); Sub-Threshold; CMOS; Sub-Threshold; SCL; Ultra-Low-Power; Circuits; Weak; Inversion; LP-LV(Low; Power-Low; Voltage);