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PARALLEL DATA TRANSMITTING SYSTEM AND MAJORITY JUDGING CIRCUIT
PARALLEL DATA TRANSMITTING SYSTEM AND MAJORITY JUDGING CIRCUIT
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机译:并行数据传输系统和重大性判断电路
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摘要
PROBLEM TO BE SOLVED: To relax restriction as against the number of output lines by inverting the code ('1' or '0') of input data when a majority logical level forming parallel data is changed. ;SOLUTION: A transmission side 1 compares transmission data and input data which are one digit-delayed by a data change detecting part 13, it is detected that the number of bits detecting the change is the majority of the number of codes forming parallel data by a simultaneous change number detecting part 14, input data is inverted by the output of the simultaneous change detecting part 14 so as to transmit it when the number of the bits detecting change is the mojority of the number of the codes forming parallel data, input data is transmitted without inversion by the output of the simultaneous change detecting part 14 when the number of the bits detecting change is equal to below the half of the number of the codes forming parallel data and the output of the simultaneous change detecting part 14 is transmitted as a flag displaying presence or absence of inversion. In the meantime, at a reception side, reception data is inverted so as to be adopted as reproduction data when the flag indicates inversion and reception data is adopted as reproduction data unless the flag indicates inversion.;COPYRIGHT: (C)1997,JPO
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