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Single-level parallel-gated carry/majority circuits and systems therefrom
Single-level parallel-gated carry/majority circuits and systems therefrom
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机译:单级并行门控进位/多数电路及其系统
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摘要
A carry/majority circuit, comprising a plurality of differential transistor pairs coupled in parallel and forming a pair of output nodes, with a single parallel gated level. Current is steered through a leg of the transistor pair having a higher input voltage.
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