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Clocking some elements of a circuit with leading edges of clock pulses and others with trailing edges

机译:用时钟脉冲的前沿为电路的某些元件计时,而用后沿为其他元件计时

摘要

A data processing circuit includes a first set of processing elements and a second set of processing elements. A clock provides common clocking signals to the processing elements, however, the first set of elements are clocked by rising edges of the clocking signals and the second set of elements are clocked by falling edges of the clocking signals. Circuitry is described for comparing the exponents of floating point numbers to enable normalisation.
机译:数据处理电路包括第一组处理元件和第二组处理元件。时钟向处理元件提供公共的时钟信号,但是,第一组元件由时钟信号的上升沿来计时,而第二组元件由时钟信号的下降沿来计时。描述了用于比较浮点数指数以实现归一化的电路。

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