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Dual-Edge Triggered Storage Elements and Clocking Strategy for Low-Power Systems

机译：低功耗系统的双沿触发存储元件和时钟策略

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Nikola Nedovic; Vojin G. Oklobdzija;
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年度 2008
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1. Dual-edge triggered storage elements and clocking strategy for low-power systems [J] . Nedovic N., Oklobdzija V.G. IEEE transactions on very large scale integration (VLSI) systems . 2005,第5期

机译：低功耗系统的双边触发存储元件和时钟策略
2. The Effect of the System Specification on the Optimal Selection of Clocked Storage Elements [J] . Giacomotto C., Nedovic N., Oklobdzija V.G. IEEE Journal of Solid-State Circuits . 2007,第6期

机译：系统规范对时钟存储元件的最佳选择的影响
3. A reliable optimization method of hybrid energy storage system based on standby storage element and secondary entropy strategy [J] . Xidong Zheng, Tao Jin International journal of electrical power and energy systems . 2021,第Octa期

机译：基于备用存储元件和次熵策略的混合能量存储系统可靠优化方法
4. Comparative analysis of double-edge versus single-edge triggered clocked storage elements [C] . Nedovic, N., Aleksic, . 2002

机译：双边触发和单边触发时钟存储元件的比较分析
5. A novel double edge-triggered pulse-clocked TSPC D flip-flop for high-performance and low-power VLSI design applications. [D] . Pontikakis, Bill. 2003

机译：一种新颖的双边沿触发脉冲时钟TSPC D触发器，适用于高性能和低功耗VLSI设计应用。
6. Focal-Plane Change Triggered Video Compression for Low-Power Vision Sensor Systems [O] . Yu M. Chi, Ralph Etienne-Cummings, Gert Cauwenberghs 2009

机译：低功率视觉传感器系统的焦平面变化触发视频压缩
7. Energy Efficiency of Power-Gating in Low-Power Clocked Storage Elements [O] . Christophe Giacomotto, Eep Singh, Milena Vratonjic, 2010

机译：低功耗时钟存储元件功率门控的能效

Dual-Edge Triggered Storage Elements and Clocking Strategy for Low-Power Systems

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