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Method of making a PMOSFET in a semiconductor device

机译:在半导体器件中制造PMOSFET的方法

摘要

An improved p+ polysilicon gated PMOSFET having a channel on the surface of a silicon substrate and improved short channel behavior is disclosed. A simplified process allows making a p+ doped gate and source/drain regions at the same time, the transistor particularly having a stable threshold voltage. The disclosed method provides the steps of: (A) forming an active region and an insulation region on an n- type semiconductor substrate; growing a gate insulating layer on the silicon substrate; depositing a polysilicon layer on the gate insulating layer; annealing the polysilicon layer in the presence of NH.sub.3 or other nitrogen-containing gas; (C) forming a gate line by patterning and etching the polysilicon layer; and (D) implanting BF.sub.2 ions into the semiconductor substrate.
机译:公开了一种改进的p +多晶硅栅控的PMOSFET,其在硅衬底的表面上具有沟道并且具有改善的短沟道行为。简化的工艺允许同时制造p +掺杂的栅区和源/漏区,该晶体管特别具有稳定的阈值电压。所公开的方法提供以下步骤:(A)在n型半导体衬底上形成有源区和绝缘区;以及在硅衬底上生长栅极绝缘层;在栅极绝缘层上沉积多晶硅层;在NH 3或其他含氮气体的存在下对多晶硅层进行退火; (C)通过构图和蚀刻多晶硅层形成栅极线; (D)将BF 2离子注入到半导体衬底中。

著录项

  • 公开/公告号US5843812A

    专利类型

  • 公开/公告日1998-12-01

    原文格式PDF

  • 申请/专利权人 GOLDSTAR ELECTRON CO. LTD.;

    申请/专利号US19970946774

  • 发明设计人 HYUNSANG HWANG;

    申请日1997-10-08

  • 分类号H01L21/336;

  • 国家 US

  • 入库时间 2022-08-22 02:09:25

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