Trench isolation structure employing protective sidewall spacers upon exposed surfaces of the isolation trench

摘要

A shallow trench isolation structure and method for making the same are presented. In an embodiment, a trench dielectric is formed within a shallow trench that is disposed in a semiconductor substrate comprising single-crystalline silicon. Dielectric spacers are formed upon the opposed sidewall surfaces of a gate conductor arranged upon the semiconductor substrate a spaced distance from the trench dielectric. Formation of these dielectric spacers involves depositing a dielectric material across the semiconductor topography and anisotropically etching the dielectric material from horizontal surfaces more quickly than from the vertical sidewall surfaces of the gate conductor. Etch duration is terminated after a pre-defined lateral thickness of the dielectric material is achieved upon the sidewall surfaces of the gate conductor. The upper surface of the trench dielectric is also attacked by etchants during the formation of the dielectric spacers. The resulting upper surface of the trench dielectric is recessed below the upper surface of the semiconductor substrate. Protective spacers are subsequently formed upon exposed portions of the trench sidewalls between the upper surface of the substrate and the upper surface of the trench dielectric. These protective spacers inhibit silicide formation upon the trench sidewalls during subsequent formation of silicide upon source/drain junctions of the substrate directly adjacent the trench sidewalls.