A novel 4H-SiC trench MOSFET with double shielding structures and ultralow gate-drain charge

摘要

A new ultralow gate–drain charge(Q_(GD)) 4 H-SiC trench MOSFET is presented and its mechanism is investigated by simulation. The novel MOSFET features double shielding structures(DS-MOS): one is the grounded split gate(SG), the other is the P+shielding region(PSR). Both the SG and the PSR reduce the coupling effect between the gate and the drain, and transform the most part of the gate–drain capacitance(C_(GD)) into the gate–source capacitance(C_(GS)) and drain–source capacitance(C_(DS)) in series.Thus the C_(GD) is reduced and the proposed DS-MOS obtains ultralow Q_(GD). Compared with the double-trench MOSFET(DT-MOS)and the conventional trench MOSFET(CT-MOS), the proposed DS-MOS decreases the Q_(GD) by 85% and 81%, respectively.Moreover, the figure of merit(FOM), defined as the product of specific on-resistance(R_(on, sp)) and Q_(GD)(R_(on, sp)Q_(GD)), is reduced by 84% and 81%, respectively.