首页>
外国专利>
Dynamically configurable variable frequency and duty cycle clock and signal generation
Dynamically configurable variable frequency and duty cycle clock and signal generation
展开▼
机译:可动态配置的可变频率和占空比时钟以及信号生成
展开▼
页面导航
摘要
著录项
相似文献
摘要
A variable clock generator includes a clock multiplier that generates from a reference clock at least two clock signals which are out of phase with each other and a clock divider which receives a plurality of divider patterns and which receives at least two clock signals from the clock multiplier. The clock divider generates an output clock based on the divider patterns and the clock signals. In a particular embodiment, the clock divider includes a plurality of loadable linear feedback shift registers each having an output. An EXCLUSIVE OR gate that is responsive to the outputs of the linear feedback shift registers then EXCLUSIVE ORs the outputs of the linear feedback shift registers to produce the output clock. Preferably, the size of the linear feedback shift registers corresponds to the size of the divider patterns.
展开▼