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METHOD AND DEVICE FOR VERIFYING DESIGN OF MICROPROCESSOR AND PIPELINE SIMULATOR GENERATION DEVICE

机译:微处理机和管道仿真器生成装置验证设计的方法和装置

摘要

PROBLEM TO BE SOLVED: To verify the pipeline operation of a microprocessor with high accuracy and also with satisfactorily high efficiency. SOLUTION: A pipeline simulator and a verification program are generated according to the pipeline specifications which are described so that a computer can understand them and then the pipeline operation is verified on the basis of the result of simulation of RTL description that is carried out according to the verification program and the RTL description and also on the basis of the result of pipeline simulation that is carried out according to the verification program and the pipeline simulator.
机译:要解决的问题:以高精度和令人满意的高效率验证微处理器的流水线操作。解决方案:根据描述的管线规格生成管线模拟器和验证程序,以便计算机可以理解它们,然后根据根据RTL描述进行的模拟结果验证管线操作验证程序和RTL描述,并且还基于根据验证程序和管道模拟器执行的管道模拟结果。

著录项

  • 公开/公告号JP2001273340A

    专利类型

  • 公开/公告日2001-10-05

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP20000087411

  • 发明设计人 KONO KAZUYOSHI;MIZUNO ATSUSHI;

    申请日2000-03-27

  • 分类号G06F17/50;G06F11/26;

  • 国家 JP

  • 入库时间 2022-08-22 01:29:32

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