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Semiconductor device design verification support device, semiconductor device design verification support program, and semiconductor device design verification support method
Semiconductor device design verification support device, semiconductor device design verification support program, and semiconductor device design verification support method
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机译:半导体器件设计验证支持设备,半导体器件设计验证支持程序,以及半导体器件设计验证支持方法
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摘要
A design verification support apparatus includes, a memory that stores circuit information and test pattern information, and a processor coupled to the memory. The processor performs a process including, acquiring the circuit information and the test pattern information from the memory, calculating a delay time occurring until the first clock signal reaches each of a plurality of memory circuits coupled in series and included in the scan chain from the clock source, based on the circuit information, selecting a first memory circuit whose first output value is to be changed by a shift operation among the plurality of memory circuits, based on the test pattern information at the cycle, and calculating the first output value of the first memory circuit when a second clock signal is supplied to the first memory circuit, the second clock signal being obtained by delaying the first clock signal by a delay time.
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