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Design verification method, design verification device for microprocessors, and pipeline simulator generation device
Design verification method, design verification device for microprocessors, and pipeline simulator generation device
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机译:设计验证方法,用于微处理器的设计验证装置以及流水线模拟器生成装置
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摘要
In the design verification method, the design verification device, and the pipeline simulator generation device for microprocessors, a pipeline simulator (4, S4, S12) and verification programs for a microprocessor as a target in design are automatically generated (7, S9, S10) based on a pipeline specification described in a description language readable and analyzable by a computer, and the pipeline operation of the microprocessor is verified (12, S15, S16) based on the results (S13) of the simulation (11) of the RTL description and the result (6, S14) of the pipeline simulation performed based on the verification programs and the pipeline simulator.
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机译:在设计验证方法,设计验证装置以及用于微处理器的流水线模拟器生成装置中,流水线模拟器( 4, B> S 4, B> S 12 B>)和基于设计的目标微处理器的验证程序会自动生成( 7, B> S 9, B> S 10 B>)计算机以可读和可分析的描述语言描述管道规范,并验证微处理器的管道操作( 12, B> S 15, B> S 16 B>)基于RTL描述的模拟结果( 11 B>)和结果( 6, B> S < B> 14 B>)基于验证程序和管道模拟器执行的管道模拟。
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