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SEMICONDUCTOR DEVICE COMBINING THE ADVANTAGES OF MASSIVE AND SOI ARCHITECTURE, AND METHOD FOR MAKING SAME

机译:结合了大规模和SOI体系结构优势的半导体器件及其制造方法

摘要

The invention concerns a semiconductor device comprises a silicon body (10) wherein are formed source and drain regions (23, 24) defining between them a channel region, a thin gate dielectric layer (14) on the channel region and a gate (15) on the thin gate dielectric layer, a buried layer of dielectric material (22) extending between the source and drain regions (23, 24) and a thin silicon layer (13) extending between the source and drain regions and included between the buried dielectric material layer (22) and the gate dielectric layer (14). The invention is characterised in that said thin silicon layer (13) has an area greater than that of the gate dielectric layer (4) such that its upper surface comprises two opposite zones (13) extending beyond the gate dielectric layer (4) and the source and drain regions (8, 9) each respectively overlapping, at least partly, one of said opposite zones (13a). The invention is applicable to transistors.
机译:本发明涉及一种半导体器件,其包括硅体(10),其中形成有在其之间限定沟道区,在沟道区上的薄栅极电介质层(14)和栅极(15)的源极区和漏极区(23、24)。在薄栅极介电层上,在源极和漏极区(23、24)之间延伸的介电材料的埋层(22)和在源极和漏极区之间延伸并包括在埋入的介电材料之间的薄硅层(13)层(22)和栅极介电层(14)。本发明的特征在于,所述薄硅层(13)的面积大于栅极介电层(4)的面积,使得其上表面包括两个相对的区域(13),其延伸超过栅极介电层(4),且源区和漏区(8、9)分别至少部分地与所述相对区(13a)之一重叠。本发明适用于晶体管。

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