SEMICONDUCTOR DEVICE INCLUDING TESTER CIRCUIT SUPPRESSIBLE OF CIRCUIT SCALE INCREASE AND TESTING DEVICE OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: To provide a semiconductor memory provided with a built-in test circuit permitting to replace a defective memory cell with a redundant memory cell. CONSTITUTION: After having written data in a memory cell array according to an internal address signal, a read-out data from each memory cell are compared with an expectation value data in the reading operation. When two rows and two columns are arranged for spare, a permutation decision parts 3100.1-3100.6 are arranged for each of six ways of sequence for sequentially permuting the memory cell rows with the memory cell columns. Defective addresses are written in four groups of cell rows to be arranged corresponding to each permutation decision part 3100.1-3100.6 only when a defective memory cell is found which differing in address from at least either of the line address and row address of a defective memory cell which has already been stored.