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Integrated semiconductor memory with redundant memory cell devices and method for operating it causes memory cells to combine in standard devices with single addresses and a redundant device to replace one of the standard devices.
Integrated semiconductor memory with redundant memory cell devices and method for operating it causes memory cells to combine in standard devices with single addresses and a redundant device to replace one of the standard devices.
Memory cells combine in standard devices with single addresses and a redundant device (RWL) to replace one of the standard devices. One address for the standard device to be replaced by the redundant device is stored in programmable elements (F). For a standard device to be selected (WL4) memory picks up an address that is compared to a stored address and with a positive match the standard device to be selected is activated along with the redundant device.
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