首页> 外国专利> Method to fabricate high Q inductor by redistribution layer when flip-chip package is employed

Method to fabricate high Q inductor by redistribution layer when flip-chip package is employed

机译:采用倒装芯片封装时通过再分布层制造高Q值电感器的方法

摘要

A new method is provided for the creation of a high Q inductor that can be applied together with the mounting of flip chip semiconductor die on a substrate. The process of the invention starts with a semiconductor surface over which a layer of insulation and intra-metal dielectric have been deposited with interconnect patterns created in said layers of insulation and dielectric. A layer of low-K polyimide is deposited over the surface of the intra-metal dielectric, active circuits have previously been created in the substrate. After the layer of low-K polyimide has been deposited, a redistribution pattern is defined in the layer of low-K poly. Metal is deposited that forms the redistribution metal, the deposited layer of metal is planarized thereby forming the metal redistribution pattern. The inductor is next defined, the inductor is created on the surface of the layer of low-K polyimide. A layer of poly is deposited over the created inductor, back-end processing is then performed that creates openings for the BGA contact points that are to be established with the active devices in the substrate via BGA's or other methods of interconnect.
机译:提供了一种用于创建高Q电感器的新方法,该方法可与倒装芯片半导体管芯安装在基板上一起应用。本发明的方法从半导体表面开始,在该半导体表面上沉积了绝缘和金属内电介质层,并在所述绝缘和电介质层中形成了互连图案。在金属内电介质的表面上沉积一层低K的聚酰亚胺,先前已在基板中创建了有源电路。在沉积低K聚酰亚胺层之后,在低K聚层中定义一个重新分布图案。沉积形成再分布金属的金属,将沉积的金属层平坦化,从而形成金属再分布图案。接下来定义电感,在低K聚酰亚胺层的表面上创建电感。在形成的电感器上沉积一层多晶硅,然后执行后端处理,该处理为通过BGA或其他互连方法与衬底中的有源器件建立的BGA接触点创建了开口。

著录项

  • 公开/公告号US06180445B2

    专利类型

  • 公开/公告日2001-01-30

    原文格式PDF

  • 申请/专利权人

    申请/专利号US09556422

  • 发明设计人 CHAO-CHIEH TSAI;

    申请日2000-04-24

  • 分类号H01L218/234;

  • 国家 US

  • 入库时间 2022-08-22 01:07:32

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