Process for manufacturing selection transistors for nonvolatile serial-flash, EPROM, EEPROM and flash-EEPROM memories in standard or AMG configuration

摘要

The driving capability of a selection transistor is increased by an N-type implant at the source and drain regions of the selection transistor itself. This implant is conveniently made at the end of the self-aligned etching, using the same self-aligned etching mask defining the control gate regions and the floating gate regions of memory elements, keeping the circuitry area covered by a circuitry mask.